Authors : P.K. Jawahar and V. Vaidehi
Abstract: IP networks are not suitable for carrying delay sensitive real time data like voice, video as they offer only best effort services. There is no guarantee that real time packets will be given preference over other non real packets and they will not be dropped during congestion. Thus, Quality of Service (QoS) for these real time multimedia streams is highly deteriorated in the network as it has no control mechanism to improve it. Only in the receiver side, various algorithms can be applied to improve quality of service for real time data transmission as the receiver can not request the sender to retransmit a missing or corrupted packet.. An adaptive reconfigurable architecture to cater the variations in the quality of service is discussed in this study. A controller acts as a static module and decides the dynamic module that has to be loaded on run time to improve the degraded QoS parameter instantaneously, making the architecture a dynamic one. Though FPGAs are power hungry devices, only few modules are loaded into FPGA on runtime reducing the overall power consumption as the new Virtex family devices consume less power. Using Xilinx Virtex devices, the implementation of partial reconfiguration of modules pertaining to QoS enhancement for VoIP networks is discussed in detail in this study.
P.K. Jawahar and V. Vaidehi , 2006. Analysis of Reconfigurable Architecture for Delay Sensitive Voice Streams over IP Networks. Asian Journal of Information Technology, 5: 1458-1463.