Authors : K. Kalyani and S. Rajaram
Abstract: Digital images and videos have become so important and are being used in a wide range of applications including digital cameras, Medical imaging, DVD, digital TV, HDTV and video telephony. These applications are feasible because of the advancement in computing and communication technologies as well as efficient image compression algorithms. Fast Cosine Transform (FCT) is widely used technique in image and video compression algorithms. FCT requires large amount of mathematical computations including memory access, multiplications and accumulations which leads to hardware complexity. The hardware complexity due to memory access can be reduced by the memory access reduction scheme called as MARS. As this Memory Access Reduction Scheme (MARS) is very much suitable for FPGA designs in this work, the 2D-FCT is proposed using MARS based architecture. Then existing architecture for 2D-FCT and the proposed MARS based 2D-FCT are simulated and synthesized in Virtex7-xc7v2000t-2flg1925 FPGA device using Xilinx ISE 14.1. The results of the Conventional 2D-FCT structure is compared with the proposed MARS based 2D-FCT to show the improvement in terms of hardware efficiency of the proposed work.
K. Kalyani and S. Rajaram, 2016. FPGA Implementation of Mars Based 2-D Fast Cosine Transform. Asian Journal of Information Technology, 15: 3455-3460.