Authors : Kaleel Rahuman and R.N. Nivethitha
Abstract: In this compression based bench mark testing sequential circuit is tested by using Built In Self Repair (BISR) strategy. This strategy describes the testing method for generation on chip broadside tests. The generation of hardware is based on the function of initial input from a specified primary state therefore using the sequential circuit to generate additional states can be reached. Primary random sequences are entered to change the repeated function and this can be validated the pair of comparable states. This strategy comprises of the primary contribution vectors and the corresponding vectors can be verified. This test is useful to achieve a maximum rate of demonstrated faults in bench mark testing sequential circuits and also their bench mark testing circuit S27 era is the fundamental objective for this technique. Often, functional input vectors are verified as verification based vectors, these are used to confirm if the function characters matches its requirement. In the automatic test equipment world any one vectors application are taken to be fault coverage of functional generation of vectors given during the developing repair strategy, then the fault coverage area easily detected. This study shows S27 circuit is used in multiplier circuit for testing application and it is done by verilog programming and simulated by modelsim 6.5version and synthesis by xilinx tool.
Kaleel Rahuman and R.N. Nivethitha, 2016. BISR Strategy for Compression Based Bench Mark Testing Sequential Circuit. Asian Journal of Information Technology, 15: 3949-3956.