Authors : A. Thushara and Devi Sreekumar
Abstract: The study presents the design of a power efficient high-speed transmitter using a new SLVS (Scalable Low Voltage Signalling) driver architecture. It is a chip to chip signalling protocol which is aimed to provide maximum performance and minimum power consumption. It is also a differential signalling system that transmits information on a pair of wires as the difference between the two single ended output voltages. SLVS offers advantages like high noise tolerance, low power consumption and high speed in transmission when compared to previous diver architectures. It can provide a data transmission rate up to tens of Gbps. It is widely used in applications like video, storage and data communications. The project work is done in Cadence Virtuoso and 55 nm technology is used.
A. Thushara and Devi Sreekumar, 2017. A High Speed SLVS Driver Based Transmitter for Low Power Serial Links. Journal of Engineering and Applied Sciences, 12: 3022-3028.