Authors : Sujatha Hiremath and Deepali Koppad
Abstract: As the number of transistors are increasing day by day, it is important to reduce the power consumption of the overall system. Hence, low power techniques are becoming more important and useful in a system design. It is necessary to reduce the power dissipation for long life, more reliable and high performance systems. Gate Diffusion Input (GDI) is one of the low power technique to achieve less power dissipation. GDI cell consists of only two transistor nMOS and pMOS. The number of transistors required to implement basic gates are less than using CMOS logic. There are three inputs, one is at the gate of both the transistor, other two are from diffusion of nMOS and pMOS. Hence, it is named as gate diffusion input. Output is taken from drain/source of both the transistors. GDI technique also has the advantage of high speed, less area. But the limitation of GDI is the output does not have a full swing of logic 1 and logic 0. In this study, basic GDI cell is modified to get a full swing of logic 1 and 0. This modified GDI cell is used to implement the arithmetic circuits such as adder, multiplier and divider circuits. Comparison results of modified full swing GDI, CMOS circuits are shown. These results are obtained from Cadence Virtuoso based on 45 nm technology with the supply voltage of 1.2 V.
Sujatha Hiremath and Deepali Koppad, 2017. Low Power Multiplier and Divider Circuit Using Full Swing Gate Diffusion Input. Journal of Engineering and Applied Sciences, 12: 9425-9429.