Journal of Engineering and Applied Sciences

Year: 2018
Volume: 13
Issue: 13
Page No. 5142 - 5149

Review Paper on Wireless Network-on-Chip Architecture

Authors : Ammar A. Ali, Bashar S. Al-Dabbagh and Laith Alzubaidi

Abstract: As fabrication technologies continue to provide smaller transistors, the number of processing cores that in multi-core processing systems increased. Large amount of data is transferred between these processing cores using Network on Chip (NoC). Fast NoCs are required for this task. Recently, wireless networks concepts is proposed to be used in NoCs. In the past decade, attention has been paid to Wireless Network on Chip (WiNoC). This research investigates the latest improvements in the field of WiNOC since the year 2014. It is intended for this research to cover the state of the art of the latest proposed research in this era. Several research study have been studies in this research. The study’s focus varied on different topics starting from system level down to the circuit levels. All of these levels have been covered in this research. Tens of research papers have been studied in preparation for this research. Only ten study which have vital contributions are presented. The discussed contributions varied on different levels starting form circuit level up to application level. Challenges and suggestions for future research are presented at the end of this study.

How to cite this article:

Ammar A. Ali, Bashar S. Al-Dabbagh and Laith Alzubaidi, 2018. Review Paper on Wireless Network-on-Chip Architecture. Journal of Engineering and Applied Sciences, 13: 5142-5149.

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