Abstract: This study deals about 4 bit carry look ahead adder implementation in differential cascade voltage switch and multi output domino logic styles. The main idea of Manchester carry chain is splitting the carry into odd and even parts for reducing the delay time for carry bit to increase the speed of the circuit. The DCVS and MODL logic styles are analyzed in terms of power, delay and power delay product with supply voltages 0.8-1.8 V and temperature 27°C at 180 nm technology.