Abstract: Data Dependent Permutations (DDP) attracted the interest of cryptographers last years. CIKS-1 is a latest published block cipher based on DDP transformations. In this paper, an area optimized architecture and the FPGA implementation of this cipher are proposed. The proposed architecture introduces an area-optimized combination of the different encryption and decryption schemes of CIKS-1 algorithm. The comparisons of the introduced design with the conventional architecture prove that the proposed architecture allocates 20-30% less area and it is better by about 14% in the Area-Delay product. The Performance/Area ratio proves that the proposed architecture is superior to the conventional by about 25%. Detailed performance analysis results are presented. The proposed implementation is designed on a pipelined architecture and reaches throughput value up to 2.5 Gbps. The achieved high throughput ensures fast encryption and it is suitable for networks with hard performance demands.
N. Sklavos and B. V. Izotov , 2004. Architectural Optimization and VLSI Implementation of CIKS Encryption Algorithm . Asian Journal of Information Technology, 3: 1159-1169.