Authors : J. Gowrishankar and J. Belwinedward
Abstract: This project commenced with a 31-level Asymmetrical Cascaded H-Bridge Multilevel Inverter (ASCHBMLI). The topology is based on a cascaded connection of single stage sub multilevel converter unit and full bridge cascaded H-bridge inverter. The input DC voltage source of V dc1-V dc4are planned in paired type of voltage of 15 V dc1, 30 V dc2, 60 V dc3and 120 V dc4individually. The output voltage levels are 2*(1+2+4+8)+1 = 31) 31 level. The low frequency pulse width modulation technique is utilized for controlling the power semiconductor switches in the ASCHBMLI. Total harmonic distortion is analyses and executed in real time system using PIC16F877A microcontroller.
J. Gowrishankar and J. Belwinedward, 2018. A 31-Level Asymmetrical Cascaded H Bridge Multilevel Inverter. Journal of Engineering and Applied Sciences, 13: 4542-4550.