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Nehru, K. and A. Shanmugam, 2014. Design of high-performance low-power full adder. Int. J. Comput. Applic. Technol., 49: 134-140.
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Roy, S., 2015. Analysis of various DCVSL structures and implementation of full adder with them. MTech Thesis, National Institutes of Technology, Rourkela, India.

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