References

Koppad, D. and S. Hiremath, 2016. Low power 1-bit full adder circuit using modified Gate Diffusion Input (GDI). Proceedings of the 2016 IEEE 1st International Conference on Micro and Nano Technologies Modelling and Simulation, March 21-24, 2016, IEEE, Leipzig, Germany, pp: 65-68.

Morgenshtein, A., A. Fish and I.A. Wagner, 2002. Gate-Diffusion Input (GDI): A power-efficient method for digital combinatorial circuits. IEEE Trans. Very Large Scale Integr. Syst., 10: 566-581.
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Neil, H.E.W. and E. Kamran, 1993. Principles of CMOS VLSI Design. 2nd Edn., Pearson Education Ltd., London, England, ISBN:978-81-317-19412-8, Pages: 737.

Singh, A.P. and R. Kumar, 1892. Implementation of 1-bit full adder using Gate Diffusion Input (GDI) cell. Intl. J. Electron. Comput. Sci. Eng., 1: 333-342.
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Subudhi, A.D., K.C. Gauda, A.K. Pala and J. Das, 2014. Design and implementation of high speed 4x4 vedic multiplier. Intl. J. Adv. Res. Comput. Sci. Software Eng., 4: 362-366.